VHDL & FPGA Design Device - Engineering Assignment Help
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SWINBURNE UNIVERSITY of Technology Exam Question Bank is not sponsored or endorsed by this college or university.
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United Kingdom
Assignment Task
Aims of the coursework:
1. To create a modular system using VHDL.
2. To use simulation and test to verify the correctness of the design.
3. To demonstrate the milestones working on a target FPGA device.
4. To document the entire design process - recording the technical detail and justification of the work done.
VHDL as part of a design process:
A key to successfully developing a working system by the use of VHDL modelling is not to view the VHDL being written in isolation to the rest of the design process. To go from a behavioural description, through to being able to configure the target FPGA hardware, VHDL is just one jigsaw piece within a set of pieces that make up the design process.
Assessment and Milestones:
The design process to implement the task will take place around a set of milestones - where the objective of the first milestone will be to use example building blocks to become familiar with both VHDL and the computer-based tools. Later milestones will add progressive functionality and complexity towards the goal of achieving a completely working system on a target FPGA device.
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